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Volume 1, Issue 1, June 2014
Published Papers
ANALYSIS OF MASS TRANSFER WITH VARIABLE THERMAL CONDUCTIVITY IN NON-NEWTONIAN FLUID 
ANALYSIS OF MASS TRANSFER WITH VARIABLE THERMAL CONDUCTIVITY IN NON-NEWTONIAN FL
Authors: Dr.Sayed Anis Fatima Hameed
Year: 2014 | Volume: 1 | Issue: 1 | PageNo: 101-104
GLANCE over VANET, ATTACKS over VANET and their IDS approaches GLANCE over VANET, ATTACKS over VANET and their IDS approaches
Authors: Ravi Patel, Khushbu Shah
Year: -0001 | Volume: 1 | Issue: 1 | PageNo: 0-0
Windows Artifacts as a part of Digital Investigation Windows Artifacts as a part of Digital Investigation
Authors: Divyang Rahevar, Nisarg Trivedi, H P.Sanghvi
Year: -0001 | Volume: 1 | Issue: 1 | PageNo: 0-0
Comparative Analysis of Simple Image Fusion Method and Wavelet Based Image Fusion Method Comparative Analysis of Simple Image Fusion Method and Wavelet Based Image Fusio
Authors: Pinky P Shah , Pratik K Pasiyawala
Year: -0001 | Volume: 1 | Issue: 1 | PageNo: 0-0
Noise Analysis of DBSCAN Algorithm for High Dimensional Datasets in WEKA Noise Analysis of DBSCAN Algorithm for High Dimensional Datasets in WEKA
Authors: Chetan Dharni
Year: -0001 | Volume: 1 | Issue: 1 | PageNo: 0-0
Image Quality Improvement by Post Processing Algorithm with Variable Bit rate Image Quality Improvement by Post Processing Algorithm with Variable Bit rate
Authors: Pinky P Shah , Pratik K Pasiyawala , Arjun H Joshi
Year: -0001 | Volume: 1 | Issue: 1 | PageNo: 0-0
Optimization of low voltage cmos charge pump for energy harvesting applications Optimization of low voltage cmos charge pump for energy harvesting applications
Authors: Harpreet Singh
Year: -0001 | Volume: 1 | Issue: 1 | PageNo: 0-0
Optimization And Performance Analysis Of Transceiver Front End Low Power Low Noise Amplifier Optimization And Performance Analysis Of Transceiver Front End Low Power Low Noi
Authors: Harpreet Singh , Mandeep Singh
Year: -0001 | Volume: 1 | Issue: 1 | PageNo: 0-0
Optimization Of CMOS Low Power High Speed Dual Edge Triggered Flip Flop Optimization Of CMOS Low Power High Speed Dual Edge Triggered Flip Flop
Authors: Harpreet Singh
Year: -0001 | Volume: 1 | Issue: 1 | PageNo: 0-0
